read-first cell structure and the static random access memory having a write driver (SRAM) is described. In one embodiment, SRAM bit cell has six transistors. Read-first bit cell, each of the pull-up transistor, and is implemented by providing two inverter having a pull-down transistors, and the pass-gate transistors. Each pull-up transistor is associated with a feedback loop. Feedback loop, thereby improving the random static noise margin. Each transistor has a width and length. The length of the pass-gate transistors are increased. The width of the pull-down transistors are also equal to the widths of the same, and the pass-gate transistors together. And the pass-gate pull-down transistor of the width may also be increased with respect to the conventional design. The write auxiliary circuits to improve the performance, may also be used. ;
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