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Formation of an asymmetric trench in a semiconductor substrate and a bipolar semiconductor device having an asymmetric trench isolation region
Formation of an asymmetric trench in a semiconductor substrate and a bipolar semiconductor device having an asymmetric trench isolation region
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机译:在半导体衬底中形成不对称沟槽和具有不对称沟槽隔离区的双极半导体器件
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摘要
Disclosed is a trench formation technique wherein an opening having a first sidewall with planar contour and a second sidewall with a saw-tooth contour is etched through a semiconductor layer and into a semiconductor substrate. Then, a crystallographic wet etch process expands the portion of the opening within the semiconductor substrate to form a trench. Due to the different contours of the sidewalls and, thereby the different crystal orientations, one sidewall etches faster than the other, resulting in an asymmetric trench. Also disclosed is a bipolar semiconductor device formation method that incorporates the above-mentioned trench formation technique when forming a trench isolation region that undercuts an extrinsic base region and surrounds a collector pedestal. The asymmetry of the trench ensures that the trench isolation region has a relatively narrow width and, thereby ensures that both collector-to-base capacitance Ccb and collector resistance Rc are minimized within the resulting bipolar semiconductor device.
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机译:公开了一种沟槽形成技术,其中具有穿过半导体层并进入半导体衬底的具有具有平面轮廓的第一侧壁和具有锯齿形轮廓的第二侧壁的开口被蚀刻。然后,结晶湿法蚀刻工艺扩展了半导体衬底内的开口的一部分以形成沟槽。由于侧壁的轮廓不同以及由此的不同的晶体取向,一个侧壁比另一侧壁蚀刻更快,从而导致不对称沟槽。还公开了一种双极半导体器件的形成方法,该方法在形成对外部基极区域进行底切并围绕集电极基座的沟槽隔离区域时,结合了上述沟槽形成技术。沟槽的非对称性确保沟槽隔离区具有相对较窄的宽度,从而确保集电极-基极电容C cb Sub>和集电极电阻R c Sub>在最终的双极半导体器件中最小化。
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