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Method of fabricating memory device with charge storage layer at gap located side of gate dielectric underneath the gate

机译:在栅极下方的位于栅极电介质侧的间隙处具有电荷存储层的存储器件的制造方法

摘要

A method for fabricating a memory device of this invention includes at least the following steps. A tunnel dielectric layer is formed over a substrate. A gate is fowled over the tunnel dielectric layer. At least one charge storage layer is formed between the gate and the tunnel dielectric layer. Two doped regions are formed in the substrate beside the gate. A word line is formed on and electrically connected to the gate, wherein the word line having a thickness greater than a thickness of the gate.
机译:制造本发明的存储器件的方法至少包括以下步骤。在衬底上方形成隧道电介质层。栅极在隧道电介质层上方形成。在栅极和隧道电介质层之间形成至少一个电荷存储层。在栅极旁边的衬底中形成两个掺杂区。字线形成在栅极上并与栅极电连接,其中该字线的厚度大于栅极的厚度。

著录项

  • 公开/公告号US9018085B2

    专利类型

  • 公开/公告日2015-04-28

    原文格式PDF

  • 申请/专利权人 MACRONIX INTERNATIONAL CO. LTD.;

    申请/专利号US201414198320

  • 申请日2014-03-05

  • 分类号H01L29/66;H01L21/28;H01L29/423;H01L29/788;H01L29/792;H01L27/115;

  • 国家 US

  • 入库时间 2022-08-21 15:18:12

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