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Semiconductor device with flash memory cells having improved arrangement for floating gate electrodes and control gate electrodes of the flash memory cells
Semiconductor device with flash memory cells having improved arrangement for floating gate electrodes and control gate electrodes of the flash memory cells
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机译:具有具有改进的用于闪存单元的浮栅电极和控制栅电极的布置的闪存单元的半导体器件
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摘要
A semiconductor device having a nonvolatile memory is reduced in size. In an AND type flash memory having a plurality of nonvolatile memory cells having a plurality of first electrodes, a plurality of word lines crossing therewith, and a plurality of floating gate electrodes disposed at positions which respectively lie between the plurality of adjacent first electrodes and overlap the plurality of word lines, as seen in plan view, the plurality of floating gate electrodes are formed in a convex shape, as seen in cross section, so as to be higher than the first electrodes. As a result, even when nonvolatile memory cells are reduced in size, it is possible to process the floating gate electrodes with ease. In addition, it is possible to improve the coupling ratio between floating gate electrodes and control gate electrodes of the word lines without increasing the area occupied by the nonvolatile memory cells.
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