首页> 外国专利> A semiconductor device with differently stressed etching stop layers in conjunction with pn - transitions of different design in the different component areas and a method for the production of the semiconductor component

A semiconductor device with differently stressed etching stop layers in conjunction with pn - transitions of different design in the different component areas and a method for the production of the semiconductor component

机译:具有在不同部件区域中具有不同设计的pn-过渡的具有不同应力的蚀刻停止层的半导体器件及其制造方法

摘要

A method with:Carrying out a preliminary amorphization per process - at the drain and source regions in the first p - transistors and / or first n - transistors in a first component area, while second p - transistors and second n - transistors, which, in a second component are formed of a semiconductor component, may be masked, wherein the preliminary amorphization per process the implantation conditions in a subsequent implanting process for the production of low drain - and source regions is improved, and wherein the first component region is a respective said logic section and the second component represents a memory area;Forming a strained layer with a pressure bracing on via the first and second p - transistors; andForming a strained layer with a tensile stress by means of the first and second transistors n -.
机译:一种方法,该方法包括:-在第一分量区域中的第一p-晶体管和/或第一n-晶体管的漏极和源极区域处进行每个工艺的初步非晶化,而第二p-晶体管和第二n-晶体管,在第二部件中,第二部件由半导体部件形成,可以被掩蔽,其中改善了每个工艺的初步非晶化,改善了在随后的注入工艺中用于产生低漏-源区的注入条件,并且其中第一部件区是所述逻辑部分和第二组件分别表示存储区域;通过第一和第二p-晶体管形成带有压力支撑的应变层;借助于第一和第二晶体管n-形成具有拉应力的应变层。

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