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Memory devices and methods of operating memory devices including applying a potential to a source and a select gate between the source and a string of memory cells while performing a program operation on a memory cell in the string
Memory devices and methods of operating memory devices including applying a potential to a source and a select gate between the source and a string of memory cells while performing a program operation on a memory cell in the string
Devices, systems and methods of biasing in memory devices facilitate memory device programming and/or erase operations. In at least one embodiment, a first string of memory cells comprising a selected memory cell and a second string of memory cells are coupled to a common data line and a common source where the data line and the source are biased to substantially the same potential during a programming and/or erase operation performed on one or more of the strings of memory cells.
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