Memory devices that apply a programming potential to a memory cell in a string coupled to a source and data line concurrently with biasing the data line to a greater potential than the source

摘要

A first string of memory cells, including a selected memory cell, and a second string of memory cells are coupled to a common data line and a common source. The data line is biased to a first potential greater than a second potential to which the source is biased and a select gate coupled between the second string of memory cells and the data line is deactivated during a programming operation performed on the selected memory cell. The programming operation includes applying a programming potential to a control gate of the selected memory cell concurrently with biasing the data line to the first potential and biasing the source to the second potential while the select gate is deactivated.