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HETEROGENEOUS SAMPLING DELAY-LINE TIME-TO-DIGITAL CONVERTER

机译:异构采样延迟时间数字转换器

摘要

A delay line-based time-to-digital converter according to an embodiment of the present invention comprises: a coarse counter for counting pulses of a timing clock so as to measure the time when an edge of an input signal is detected; a fine time interpolator including a delay line which includes a plurality of first delay elements and a plurality of second delay elements and into which the input signal is input, and a flip-flop unit into which outputs of the plurality of first delay elements or outputs of the plurality of second delay elements are input and which uses the timing clock as the operating frequency thereof; and a timestamp generation unit for receiving a digital value for the time measured by the coarse counter and the fine time interpolator, and creating a timestamp for the input signal using the received digital value.
机译:根据本发明的实施例的基于延迟线的时间-数字转换器包括:粗略计数器,用于对定时时钟的脉冲进行计数,以测量检测到输入信号的边缘时的时间。精细时间内插器,其包括:延迟线,其包括多个第一延迟元件和多个第二延迟元件,输入信号被输入到该延迟线;以及触发器单元,多个第一延迟元件的输出或输出被输入到该触发器单元。输入多个第二延迟元件中的第二延迟元件,并且使用定时时钟作为其工作频率。时间戳生成单元,用于接收由粗略计数器和精细时间内插器测量的时间的数字值,并使用接收到的数字值为输入信号创建时间戳。

著录项

  • 公开/公告号KR20160055018A

    专利类型

  • 公开/公告日2016-05-17

    原文格式PDF

  • 申请/专利权人 SEOUL NATIONAL UNIVERSITY R&DB FOUNDATION;

    申请/专利号KR20140154763

  • 发明设计人 LEE JAE SUNG;WON JUN YEON;

    申请日2014-11-07

  • 分类号H03K5/26;H03K5/14;H03L7/06;

  • 国家 KR

  • 入库时间 2022-08-21 14:14:29

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