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Integrated circuit package technology and configuration for small form factor or wearable device
Integrated circuit package technology and configuration for small form factor or wearable device
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机译:小型或可穿戴设备的集成电路封装技术和配置
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摘要
Embodiments of the present disclosure are directed toward integrated circuit (IC) packaging techniques and configurations for small form-factor or wearable devices. In one embodiment, an apparatus may include a substrate having a first side and a second side disposed opposite to the first side and a sidewall disposed between the first side and the second side, the sidewall defining a perimeter of the substrate, and a plurality of through-substrate vias (TSVs) disposed between the first side and the second side of the substrate, and a first dielectric layer disposed on the first side and including electrical routing features to route electrical signals of one or more dies in a plane of the first dielectric layer. Other embodiments may be described and/or claimed.
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