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Memory test with in-line error correction code logic to test memory data and test the error correction code logic surrounding the memories
Memory test with in-line error correction code logic to test memory data and test the error correction code logic surrounding the memories
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机译:带有在线纠错码逻辑的内存测试可测试内存数据并测试存储器周围的纠错码逻辑
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摘要
Systems and methods are provided for reusing existing test structures and techniques used to test memory data to also test error correction code logic surrounding the memories. A method includes testing a memory of a computing system with an error code correction (ECC) logic block bypassed and a first data pattern applied. The method further includes testing the memory with the ECC logic block enabled and a second data pattern applied. The method also includes testing the memory with the ECC logic block enabled and the first data pattern applied.
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