首页> 外国专利> INTEGRATED CIRCUIT AND METHOD TO FORM FIELD EFFECT TRANSISTOR IN A BLOCK OF AN INTEGARATED CIRCUIT

INTEGRATED CIRCUIT AND METHOD TO FORM FIELD EFFECT TRANSISTOR IN A BLOCK OF AN INTEGARATED CIRCUIT

机译:集成电路和在集成电路块中形成场效应晶体管的方法

摘要

An integrated circuit is provided. The integrated circuit includes at least one block which includes a first cell which includes a first field effect transistor formed with a first contacted poly pitch and a second cell which includes a second field effect transistor formed with a second contacted poly pitch. The first contacted poly pitch is larger than the second contacted poly pitch. Accordingly, the present invention can provide a power-performance-area-cost (PPAC) target.
机译:提供了集成电路。该集成电路包括至少一个块,该至少一个块包括:第一单元,该第一单元包括形成有第一接触多晶硅间距的第一场效应晶体管;以及第二单元,该第二单元包括第二场效应晶体管形成第二触点多晶硅的间距。第一接触多节距大于第二接触多节距。因此,本发明可以提供功率-性能-面积-成本(PPAC)目标。

著录项

  • 公开/公告号KR20170021184A

    专利类型

  • 公开/公告日2017-02-27

    原文格式PDF

  • 申请/专利权人 SAMSUNG ELECTRONICS CO. LTD.;

    申请/专利号KR20150171798

  • 申请日2015-12-03

  • 分类号H01L29/772;H01L27/02;H01L29/06;H01L29/417;H01L29/423;H01L29/78;

  • 国家 KR

  • 入库时间 2022-08-21 13:28:03

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