/-- DIFFERENTIAL PVT/TIMING-SKEW-TOLERANT SELFCORRECTING CIRCUITS

摘要

Systems and methods for circuits that self-correct for errors due to input timing errors as well as changes in manufacturing processes, voltages and temperature (PVT) are described. In an exemplary embodiment, a method is provided for improving the quality of the output signal 410 in the complementary logic circuit 400. The n-type transistors in the complementary logic circuit are digitally enabled or biased by a first variable power supply (Vss) (Control B, Control D). The p-type transistor in the complementary logic circuit is digitally enabled or biased (Control A, Control C) by the second variable power supply (Vdd), and the p-type transistor 435 and the n-440 to provide a voltage that is different from the voltage of the first variable power supply.