III-V - NON-PLANAR SEMICONDUCTOR DEVICE HAVING GROUP III-V MATERIAL ACTIVE REGION WITH MULTI-DIELECTRIC GATE STACK

摘要

Non-planar semiconductor devices having Group III-V material active regions with multiple dielectric gate stacks are described. For example, a semiconductor device includes a hetero-structure disposed over a substrate. The hetero-structure includes a three-dimensional III-V material body having a channel region. The source and drain material regions are disposed over the three-dimensional III-V material body. A trench is disposed in the source and drain material regions to separate the source region from the drain region and expose at least a portion of the channel region. The gate stack is disposed on the trench and on exposed portions of the channel region. The gate stack includes first and second dielectric layers and a gate electrode.