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III-V - NON-PLANAR SEMICONDUCTOR DEVICE HAVING GROUP III-V MATERIAL ACTIVE REGION WITH MULTI-DIELECTRIC GATE STACK
III-V - NON-PLANAR SEMICONDUCTOR DEVICE HAVING GROUP III-V MATERIAL ACTIVE REGION WITH MULTI-DIELECTRIC GATE STACK
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机译:III-V-具有III-V组材料有源区且具有多电介质栅堆叠的非平面半导体器件
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摘要
Non-planar semiconductor devices having III-V material active regions with multiple dielectric gate stacks are described. For example, a semiconductor device includes a hetero-structure disposed over a substrate. The hetero-structure includes a three-dimensional III-V material body having a channel region. The source and drain material regions are disposed over a three-dimensional III-V material body. A trench is disposed in the source and drain material regions to separate the source region from the drain region and expose at least a portion of the channel region. The gate stack is placed on the trench and on the exposed portion of the channel region. The gate stack includes first and second dielectric layers and a gate electrode.
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