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STRUCTURE FEATURING FERROELECTRIC CAPACITANCE IN INTERCONNECT LEVEL FOR STEEP SUB-THRESHOLD COMPLEMENTARY METAL OXIDE SEMICONDUCTOR TRANSISTORS
STRUCTURE FEATURING FERROELECTRIC CAPACITANCE IN INTERCONNECT LEVEL FOR STEEP SUB-THRESHOLD COMPLEMENTARY METAL OXIDE SEMICONDUCTOR TRANSISTORS
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机译:速亚阈值互补金属氧化物半导体晶体管互连级的结构特性铁电电容
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摘要
After forming a first functional gate stack located on a first body region of a first semiconductor material portion located in a first region of a substrate and a second functional gate stack located on a second body region of a second semiconductor material portion located in a second region of the substrate, a ferroelectric gate interconnect structure is formed connecting the first functional gate stack and the second functional gate stack. The ferroelectric gate interconnect structure includes a U-shaped bottom electrode structure, a U-shaped ferroelectric material liner and a top electrode structure.
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