Nonvolatile, isolated gate memory cells having integrated high-K metal gate logic devices and metal-free erase gates, and methods of making same

摘要

A method of forming isolated gate nonvolatile memory cells on the same chip as logic and high voltage devices with HKMG logic gates is disclosed. The method includes forming a poly layer for source and drain regions, floating gates, control gates, and erase gates and word line gates in a memory region of the chip. A protective insulating layer is formed over the memory region, a HKMG layer and a poly layer are formed on the chip, removed from the memory region, and patterned in the logic regions of the chip to form logic gates with a variable amount of bottom insulation .