FIELD-EFFECT TRANSISTOR ARRAY, METHODS OF MAKING AND USING A FIELD-EFFECT TRANSISTOR ARRAY AND ASSOCIATED COMPUTER PROGRAM

摘要

An apparatus comprising an array of field-effect transistors, each field-effect transistor comprising a channel, source and drain electrodes configured to enable a flow of electrical current through the channel, and a gate electrode configured to enable the flow of electrical current to be varied, the gate electrode separated from the channel by a dielectric material configured to inhibit a flow of electrical current between the channel and gate electrode, wherein the gate electrode of each field-effect transistor is connected in parallel to the gate electrodes of the other field-effect transistors in the array, and wherein a respective two-terminal current-limiting component is coupled to each gate electrode such that, in the event that a defect in the dielectric material of a particular field-effect transistor allows a leakage current to flow between the channel and gate electrode of that field-effect transistor, the respective two-terminal current-limiting component limits the magnitude of the leakage current so that the other field-effect transistors in the array are substantially unaffected by the leakage current.