首页> 外国专利> VERTICAL GaN-BASED SEMICONDUCTOR DEVICE MANUFACTURING METHOD AND VERTICAL GaN-BASED SEMICONDUCTOR DEVICE

VERTICAL GaN-BASED SEMICONDUCTOR DEVICE MANUFACTURING METHOD AND VERTICAL GaN-BASED SEMICONDUCTOR DEVICE

机译:垂直GaN基半导体器件的制造方法和垂直GaN基半导体器件的制造方法

摘要

To provide a vertical GaN-based semiconductor device in which resistance of a GaN-based semiconductor substrate contributes to on-resistance of the vertical GaN-based semiconductor device and it is preferred to reduce on-resistance.SOLUTION: A manufacturing method of a vertical GaN-based semiconductor device having a GaN-based semiconductor substrate, a GaN-based semiconductor layer which includes a drift region having a lower n type impurity doping concentration than the GaN-based semiconductor substrate and provided on the GaN-based semiconductor substrate, and a MIS structure having the GaN-based semiconductor layer, an insulation film contacting the GaN-based semiconductor layer and a conductive part contacting the insulation film and comprises the steps of: implanting n type dopant into a rear face of the GaN-based semiconductor substrate after a step of forming the MIS structure; and annealing the GaN-based semiconductor substrate after the step of implanting the n type dopant.SELECTED DRAWING: Figure 1
机译:提供一种垂直GaN基半导体器件,其中GaN基半导体衬底的电阻有助于垂直GaN基半导体器件的导通电阻,并且优选降低导通电阻。 GaN基半导体器件,其具有:GaN基半导体衬底; GaN基半导体层,其包括漂移区,该漂移区具有比所述GaN基半导体衬底低的n型杂质掺杂浓度并且设置在所述GaN基半导体衬底上;以及MIS结构,其具有GaN基半导体层,与GaN基半导体层接触的绝缘膜和与绝缘膜接触的导电部分,并且包括以下步骤:将n型掺杂剂注入到GaN基半导体衬底的背面中在形成MIS结构的步骤之后;在注入n型掺杂剂的步骤之后,对GaN基半导体衬底进行退火处理。图1

著录项

  • 公开/公告号JP2019096744A

    专利类型

  • 公开/公告日2019-06-20

    原文格式PDF

  • 申请/专利权人 FUJI ELECTRIC CO LTD;

    申请/专利号JP20170225218

  • 申请日2017-11-22

  • 分类号H01L21/336;H01L29/78;H01L29/12;H01L21/265;

  • 国家 JP

  • 入库时间 2022-08-21 12:24:59

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