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Conditional phase algebra for clock analysis

机译:用于时钟分析的条件相位代数

摘要

A design tool can implement phase algebra based design evaluation to evaluate a circuit design with a compact representation of numerous waveforms without simulating the individual waveforms. The design tool can determine two or more input sequences of signal transition representations associated with an input net of an indicated component in an RTL circuit design, where the two or more input sequences of signal transition representations are associated with a mode element. Each signal transition representation represents a nondeterministic transition from a previous signal state to possible signal state(s). The mode element indicates a selection between two or more output sequences of signal transition representations. It is determined, based on the indicated component and the mode element, two or more output sequences of signal transition representations derived from the input sequence(s) of signal transition representations.
机译:设计工具可以实施基于相位代数的设计评估,以评估具有多个波形的紧凑表示的电路设计,而无需模拟单个波形。设计工具可以确定与RTL电路设计中指示组件的输入网络相关的两个或更多个信号转换表示输入序列,其中,两个或更多个信号转换表示输入序列与模式元素相关联。每个信号转换表示代表从先前信号状态到可能的信号状态的不确定性转换。模式元素指示信号转换表示的两个或多个输出序列之间的选择。基于所指示的组件和模式元素,确定从信号转换表示的输入序列导出的两个或更多个信号转换表示的输出序列。

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