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Non-silicon device heterolayers on patterned silicon substrate for CMOS by combination of selective and conformal epitaxy

机译:选择性和共形外延相结合在CMOS图案化硅基板上的非硅器件异质层

摘要

A single fin or a pair of co-integrated n- and p-type single crystal electronic device fins are epitaxially grown from a substrate surface at a bottom of one or a pair of trenches formed between shallow trench isolation (STI) regions. The fin or fins are patterned and the STI regions are etched to form a height of the fin or fins extending above etched top surfaces of the STI regions. The fin heights may be at least 1.5 times their width. The exposed sidewall surfaces and a top surface of each fin is epitaxially clad with one or more conformal epitaxial materials to form device layers on the fin. Prior to growing the fins, a blanket buffer epitaxial material may be grown from the substrate surface; and the fins grown in STI trenches formed above the blanket layer. Such formation of fins reduces defects from material interface lattice mismatches.
机译:从衬底表面在浅沟槽隔离(STI)区域之间形成的一个或一对沟槽的底部外延生长单鳍或一对共集成的n型和p型单晶电子器件鳍。图案化一个或多个鳍并且蚀刻STI区域以形成在STI区域的蚀刻的顶表面上方延伸的一个或多个鳍的高度。鳍片的高度可以至少为其宽度的1.5倍。每个鳍的暴露的侧壁表面和顶表面被一种或多种共形外延材料外延包覆,以在鳍上形成器件层。在生长鳍片之前,可以从衬底表面生长毯式缓冲外延材料。 STI沟槽中生长的鳍片形成在覆盖层上方。鳍的这种形成减少了由于材料界面晶格失配引起的缺陷。

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