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LEADFRAME PACKAGE USING SELECTIVELY PRE-PLATED LEADFRAME

机译:使用选择性预镀铅包的铅包

摘要

The present disclosure is directed to a leadframe package with a surface mounted semiconductor die coupled to leads of the leadframe package through wire bonding. The leads are partially exposed outside the package and configured to couple to another structure, like a printed circuit board (PCB). The exposed portions, namely outer segments, of the leads include a plating or coating layer of a material that enhances the solder wettability of the leads to the PCB through solder bonding. The enclosed portions, namely inner segments, of the leads do not include the plating layer of the outer segment and, thus, include a different surface material or surface finish.
机译:本公开涉及一种引线框封装,其具有通过引线键合耦合至引线框封装的引线的表面安装的半导体管芯。引线部分暴露在封装外部,并配置为耦合到另一个结构,例如印刷电路板(PCB)。引线的暴露部分,即外部部分,包括一种材料的镀层或涂层,该材料可以通过焊料键合增强引线对PCB的焊料润湿性。引线的封闭部分,即内部段,不包括外部段的镀层,因此,包括不同的表面材料或表面光洁度。

著录项

  • 公开/公告号US2019295934A1

    专利类型

  • 公开/公告日2019-09-26

    原文格式PDF

  • 申请/专利权人 STMICROELECTRONICS S.R.L.;

    申请/专利号US201815934783

  • 发明设计人 PAOLO CREMA;

    申请日2018-03-23

  • 分类号H01L23/495;H01L23;H01L21/48;

  • 国家 US

  • 入库时间 2022-08-21 12:10:10

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