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LOW-TEMPERATURE POLYCRYSTALLINE SILICON THIN FILM TRANSISTOR, PREPARATION METHOD THEREFOR, AND ARRAY SUBSTRATE
LOW-TEMPERATURE POLYCRYSTALLINE SILICON THIN FILM TRANSISTOR, PREPARATION METHOD THEREFOR, AND ARRAY SUBSTRATE
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机译:低温多晶硅硅薄膜晶体管,其制备方法和阵列基质
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摘要
A preparation method for a low-temperature polycrystalline silicon thin film transistor, said method comprising: providing a substrate (1), and sequentially forming a buffer layer (2), a low-temperature polycrystalline silicon layer (3), a source contact area (31), a drain contact area (32), a gate insulation layer (4), a gate layer (5) and a dielectric layer (6) on the substrate; forming a first contact hole (71) and a second contact hole (72) which pass through the dielectric layer and the gate insulation layer via dry etching, so as to respectively expose the source contact area and the drain contact area, an etching gas used for the dry etching comprising a fluorine-containing gas and hydrogen gas; on the dielectric layer, forming a source (8) which comes into contact with the source contact area via the first contact hole, and forming a drain (9) which comes into contact with the drain contact area via the second contact hole. H2 is added to the etching gas when preparing the contact holes via the dry etching process, a polycrystalline silicon selection ratio is increased, and polycrystalline silicon loss is very low. Also provided are the low-temperature polycrystalline silicon thin film transistor, and an array substrate.
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