LOW-TEMPERATURE POLYCRYSTALLINE SILICON THIN FILM TRANSISTOR, PREPARATION METHOD THEREFOR, AND ARRAY SUBSTRATE

摘要

A low-temperature polycrystalline silicon thin film transistor, comprising: a substrate (1); a buffer layer (2), a low-temperature polycrystalline silicon layer (3), a source contact area (31), a drain contact area (32), a gate insulation layer (4), a gate layer (5) and a dielectric layer (6) sequentially arranged on the substrate; a source (7) and a drain (8). The source contact area and the drain contact area are respectively doped with metal ions, the source passes through the dielectric layer to come into contact with the source contact area to form an ohmic contact, and the drain passes through the dielectric layer to come into contact with the drain contact area to form an ohmic contact. The metal ions comprise at least one of Cu²⁺, Al³⁺, Mg²⁺, Zn²⁺ and Ni²⁺. Also provided is a preparation method for the low-temperature polycrystalline silicon thin film transistor, wherein an insulating metal oxide layer is arranged, and annealing is performed so that metal ions within the insulating metal oxide layer are doped to a source contact area to be formed and a drain contact area to be formed, so as to form the source and drain contact areas, thereby omitting a P ion implantation process, and significantly simplifying a process flow.