Provided is an LTPS semiconductor thin-film transistor-based GOA circuit. A ninth thin-film transistor (T9) is introduced to adjust high and low levels of a voltage corresponding to a second node (P(n)). Either by employing a gate terminal and a source terminal of the ninth thin film transistor (T9) being electrically connected to the second node (P(n)) and a drain terminal being electrically connected to a second clock signal (CK2), or by employing the gate terminal of the ninth thin-film transistor (T9) being electrically connected to a fourth clock signal (CK4), the source terminal being electrically connected to the second node (P(n)), and the drain terminal being electrically connected to the second clock signal (CK2), when an output terminal (G(n)) is in a stage of maintaining a low level, the levels of the second node (P(n)) are pulled down according to a certain frequency, thus effectively preventing the second node (P(n)) from being in the high level for an extended period of time, avoiding the problem of threshold voltage shift as a result of a fourth thin-film transistor (T4) and a seventh thin-film transistor (T7) working for an extended period of time, and increasing the stability of the GOA circuit.
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