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SEMICONDUCTOR DEVICE PACKAGE WITH IMPROVED DIE PAD AND SOLDER MASK DESIGN
SEMICONDUCTOR DEVICE PACKAGE WITH IMPROVED DIE PAD AND SOLDER MASK DESIGN
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机译:具有改进的压模垫和焊料模板设计的半导体器件封装
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摘要
A described example includes a package substrate having an array of die pads arranged in rows and columns on a die mount surface, and having an opposing board side surface; a solder mask layer overlying the die mount surface; a first plurality of solder mask defined openings in the solder mask layer at die pad locations, the solder mask defined openings exposing portions of a surface of corresponding die pads, the surface facing away from the package substrate; and at least one non-solder mask defined opening in the solder mask layer at a die pad location, exposing the entire surface of the die pad and sidewalls of the die pad at the non-solder mask defined opening.
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