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SEMICONDUCTOR DEVICE PACKAGE WITH IMPROVED DIE PAD AND SOLDER MASK DESIGN

机译:具有改进的压模垫和焊料模板设计的半导体器件封装

摘要

A described example includes a package substrate having an array of die pads arranged in rows and columns on a die mount surface, and having an opposing board side surface; a solder mask layer overlying the die mount surface; a first plurality of solder mask defined openings in the solder mask layer at die pad locations, the solder mask defined openings exposing portions of a surface of corresponding die pads, the surface facing away from the package substrate; and at least one non-solder mask defined opening in the solder mask layer at a die pad location, exposing the entire surface of the die pad and sidewalls of the die pad at the non-solder mask defined opening.
机译:所描述的示例包括封装基板,该封装基板具有在管芯安装表面上以行和列排列的管芯焊盘的阵列,并且具有相对的板侧面;覆盖在管芯安装表面上的阻焊层;在管芯焊盘位置处的阻焊层中的第一多个阻焊层限定的开口,阻焊层限定的开口暴露相应的管芯焊盘的表面的一部分,该表面背对封装衬底;至少一个非焊料掩模限定的开口在管芯焊盘位置处的焊料掩模层中,在非焊料掩模限定的开口处暴露管芯焊盘的整个表面和管芯焊盘的侧壁。

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