首页> 外国专利> INTEGRATING A GATE-ALL-AROUND (GAA) FIELD-EFFECT TRANSISTOR(S) (FET(S)) AND A FINFET(S) IN A COMMON SUBSTRATE OF A SEMICONDUCTOR DIE

INTEGRATING A GATE-ALL-AROUND (GAA) FIELD-EFFECT TRANSISTOR(S) (FET(S)) AND A FINFET(S) IN A COMMON SUBSTRATE OF A SEMICONDUCTOR DIE

机译:将全栅极(GAA)场效应晶体管(FET)和FINFET集成到半导体管芯的通用基板中

摘要

Integrating at least one gate-all-around (GAA) field-effect transistor and at least one FinFET on a common substrate of a semiconductor die is disclosed. GAA FETs and FinFETs are integrated on a common substrate to optimize advantages of each type of FET. For example, FinFETs may be formed in the common substrate in the semiconductor die for forming circuits where reduced resistance and capacitance are important for performance, whereas GAA FETs may be formed in the common substrate in the semiconductor die for forming circuits with decreased threshold voltage to allow voltage scaling to lower supply voltages to reduce power consumption and also to reduce silicon area as a result of vertically stacked devices. This supports a designer having the freedom to separate control the channel width of the GAA FETs and FinFETs, which may be important for controlling drive strength and/or area for different circuits.
机译:公开了在半导体管芯的公共衬底上集成至少一个环绕栅(GAA)场效应晶体管和至少一个FinFET。 GAA FET和FinFET集成在同一基板上,以优化每种FET的优势。例如,可以在用于形成电路的半导体管芯的公共基板中形成FinFET,其中减小的电阻和电容对于性能很重要,而可以在半导体管芯的公共基板中形成GAA FET,以形成阈值电压降低至由于垂直堆叠的器件,它允许按比例缩小电压以降低电源电压,以降低功耗并减小硅面积。这支持了设计者自由地自由控制GAA FET和FinFET的沟道宽度,这对于控制不同电路的驱动强度和/或面积可能很重要。

著录项

  • 公开/公告号WO2020036662A1

    专利类型

  • 公开/公告日2020-02-20

    原文格式PDF

  • 申请/专利权人 QUALCOMM INCORPORATED;

    申请/专利号WO2019US31172

  • 发明设计人 BADAROGLU MUSTAFA;RIM KERN;

    申请日2019-05-07

  • 分类号H01L21/8234;H01L27/088;H01L29/06;H01L29/66;

  • 国家 WO

  • 入库时间 2022-08-21 11:13:22

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