首页> 外国专利> Integrating a gate-all-around (GAA) field-effect transistor(s) (FET(S)) and a finFET(s) on a common substrate of a semiconductor die

Integrating a gate-all-around (GAA) field-effect transistor(s) (FET(S)) and a finFET(s) on a common substrate of a semiconductor die

机译:在半导体管芯的公共基板上集成环绕栅极(GAA)场效应晶体管(FET)和finFET

摘要

Integrating a gate-all-around (GAA) field-effect transistor(s) and a FinFET(s) on a common substrate of a semiconductor die is disclosed. GAA FETs and FinFETs can form integrated circuits (ICs). GAA FETs and FinFETs are integrated on a common substrate to optimize advantages of each type of FET. For example, FinFETs may be formed in the common substrate in the semiconductor die for forming circuits where reduced resistance and capacitance are important for performance, whereas GAA FETs may be formed in the common substrate in the semiconductor die for forming circuits with decreased threshold voltage to allow voltage scaling to lower supply voltages to reduce power consumption and also to reduce silicon area as a result of vertically stacked devices. This supports a designer having the freedom to separate control the channel width of the GAA FETs and FinFETs, which may be important for controlling drive strength and/or area for different circuits.
机译:公开了在半导体管芯的公共基板上集成环绕栅(GAA)场效应晶体管和FinFET。 GAA FET和FinFET可以形成集成电路(IC)。 GAA FET和FinFET集成在同一基板上,以优化每种FET的优势。例如,可以在用于形成电路的半导体管芯的公共基板中形成FinFET,其中减小的电阻和电容对于性能很重要,而可以在半导体管芯的公共基板中形成GAA FET,以形成阈值电压降低至由于垂直堆叠的器件,它允许按比例缩小电压以降低电源电压,以降低功耗并减小硅面积。这支持了设计者自由地自由控制GAA FET和FinFET的沟道宽度,这对于控制不同电路的驱动强度和/或面积可能很重要。

著录项

  • 公开/公告号US10332881B1

    专利类型

  • 公开/公告日2019-06-25

    原文格式PDF

  • 申请/专利权人 QUALCOMM INCORPORATED;

    申请/专利号US201816104544

  • 发明设计人 MUSTAFA BADAROGLU;KERN RIM;

    申请日2018-08-17

  • 分类号H01L21/02;H01L27/02;H01L27/11;H01L29/06;H01L29/66;H01L21/306;H01L21/762;H01L27/088;H01L29/423;H01L21/8234;

  • 国家 US

  • 入库时间 2022-08-21 12:15:27

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