SPLIT GATE FLASH MEMORY SYSTEM USING COMPLEMENTARY VOLTAGE SUPPLIES

摘要

The nonvolatile memory device includes a semiconductor substrate of a first conductivity type. An array of nonvolatile memory cells is located in a semiconductor substrate and arranged in a plurality of rows and columns. Each memory cell includes a first region on the surface of the semiconductor substrate of the second conductivity type and a second region on the surface of the semiconductor substrate of the second conductivity type. The channel region is between the first region and the second region. The word line lies over and is insulated from the first portion of the channel region and is adjacent to the first region and little or no overlap with the first region. A floating gate overlies the second portion of the channel region, is adjacent to and insulated from the first portion, and adjacent to the second region. A coupling gate lies over the floating gate. The bit line is connected to the first region. During programming, reading, or erasing operations, a negative voltage may be applied to word lines and / or coupling gates of selected or unselected memory cells.