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METHOD AND GATE RUCTURE FOR THRESHOLD VOLTAGE MODULATION IN TRANSISTORS
METHOD AND GATE RUCTURE FOR THRESHOLD VOLTAGE MODULATION IN TRANSISTORS
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机译:晶体管阈值电压调制的方法和门结构
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摘要
The present technology provides a structure capable of independently adjusting the threshold voltages of an N-channel transistor and a P-channel transistor, and a manufacturing method thereof. The semiconductor device manufacturing method according to the present technology provides a method of preparing a substrate including a PMOS region and an NMOS region. step; Forming a germanium containing channel region in a substrate of the PMOS region; Forming a high dielectric layer on the substrate; Forming a threshold voltage control layer including a lanthanum-based element on the high dielectric layer of the NMOS region; Forming a first titanium nitride on the threshold voltage control layer and the high dielectric layer of the PMOS region; Forming an oxide suppression layer containing silicon on the first titanium nitride in the NMOS region; Forming a second titanium nitride on the oxide suppression layer and the first titanium nitride of the PMOS region; Forming a first gate stack including the high dielectric layer, first titanium nitride, and second titanium nitride on a substrate of the PMOS region; And forming a second gate stack including the high dielectric layer, the threshold voltage regulating layer, the first titanium nitride, and an oxide suppression layer on the substrate of the NMOS region.
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