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CHIP PACKAGE, METHOD OF FORMING A CHIP PACKAGE, SEMICONDUCTOR DEVICE, SEMICONDUCTOR ARRANGEMENT, THREE-PHASE SYSTEM, METHOD FOR FORMING A SEMICONDUCTOR DEVICE, AND METHOD FOR FORMING A SEMICONDUCTOR ARRANGEMENT
CHIP PACKAGE, METHOD OF FORMING A CHIP PACKAGE, SEMICONDUCTOR DEVICE, SEMICONDUCTOR ARRANGEMENT, THREE-PHASE SYSTEM, METHOD FOR FORMING A SEMICONDUCTOR DEVICE, AND METHOD FOR FORMING A SEMICONDUCTOR ARRANGEMENT
A chip package is provided. The chip package can include a semiconductor chip which comprises a first connection pad and a second connection pad on a front side, a carrier which comprises a pad contact area and a recess, an encapsulation material encapsulating the semiconductor chip, a first external connection which is free of the encapsulation material or extends out of this, an electrically conductive clip, and a contact structure, wherein the semiconductor chip is arranged so that its front side faces the carrier, wherein the first connection pad is above the recess and the second connection pad contacts the pad contact surface, the Clip over a rear side of the semiconductor chip covering the semiconductor chip, where it extends over the cutout, and wherein the electrically conductive contact structure connects the first connection pad to the first external connection in an electrically conductive manner.
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