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VLSI Implementation of Cascaded Integrator Comb Filters for DSP Applications

机译:用于Dsp应用的级联积分梳状滤波器的VLsI实现

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摘要

The recursive comb filters or Cascaded Integrator Comb filter (CIC) are commonly used as decimators for the sigma delta modulators. This paper presents the VLSI implementation, analysis and design of high speed CIC filters which are based on a low-pass filter. These filters are used in the signal decimation which has the effect on reducing the sampling rate. It is also chosen because its attractive property of both low power and low complexity since it dose not required a multiplier. Simulink toolbox available in Matlab software which is used to simulator and Verilog HDL coding help to verify the functionality of the CIC filters. Design procedures and examples are given for CIC filter with emphasis on frequency response, transfer function and register width. The implementation results show using Modified Carry Look-ahead Adder for summation and also apply pipelined filter structure enhanced high speed and make it more compatible for DSP applications.
机译:递归梳状滤波器或级联积分梳状滤波器(CIC)通常用作sigma delta调制器的抽取器。本文介绍了基于低通滤波器的高速CIC滤波器的VLSI实现,分析和设计。这些滤波器用于信号抽取中,具有降低采样率的作用。之所以选择它,是因为它不需要乘法器,因此具有低功耗和低复杂度的吸引力。 Matlab软件中提供的Simulink工具箱可用于仿真器和Verilog HDL编码,有助于验证CIC滤波器的功能。给出了CIC滤波器的设计程序和示例,重点是频率响应,传递函数和寄存器宽度。实施结果表明,采用改进的进位超前加法器进行求和,并应用流水线滤波器结构增强了高速性,使其与DSP应用程序更加兼容。

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  • 作者单位
  • 年度 2006
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  • 原文格式 PDF
  • 正文语种 {"code":"en","name":"English","id":9}
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