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Non-destructive imaging of buried electronic interfaces using a decelerated scanning electron beam

机译:使用减速扫描电子束对埋入式电子界面进行非破坏性成像

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摘要

Recent progress in nanotechnology enables the production of atomically abrupt interfaces in multilayered junctions, allowing to increase the number of transistors in a processor, as known as Moore’s law, for example. However, uniform electron transport has never been achieved across the entire interfacial area in junctions due to the existence of local defects, causing local heating and reduction in transport efficiency. To date, junction uniformity has been predominantly assessed by cross-sectional transmission electron microscopy, which requires slicing and milling processes with potentially introducing additional damage and deformation. It is therefore essential to develop an alternative non-destructive method. Here we show a non-destructive technique using scanning electron microscopy to map buried junction properties. By controlling the electron-beam energy, we demonstrate the contrast imaging of local junction resistances at a controlled depth. This technique can be applied to any buried junctions, from conventional semiconductor and metal devices to organic devices.
机译:纳米技术的最新进展使得能够在多层结中产生原子突变界面,从而增加了处理器中的晶体管数量,例如摩尔定律。然而,由于局部缺陷的存在,从未在接合部的整个界面区域上实现均匀的电子传输,这导致了局部发热并降低了传输效率。迄今为止,主要通过横截面透射电子显微镜来评估结的均匀性,这需要切片和铣削工艺,并可能引入额外的损伤和变形。因此,有必要开发一种替代性的非破坏性方法。在这里,我们展示了一种使用扫描电子显微镜绘制掩埋结特性的无损技术。通过控制电子束能量,我们证明了在受控深度处局部结电阻的对比成像。该技术可以应用于从传统的半导体和金属器件到有机器件的任何掩埋结。

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