The unique properties, such as large direct bandgap, excellent thermal stability, high μH × ns, of III-nitrides make them ideal candidates for both optoelectronic and high-speed electronic devices. In the past decades, great success has been achieved in commercialization of GaN based light emitting diodes (LEDs) and laser diodes (LDs). However, due to the lack of native substrates, thin films grown on sapphire or SiC substrates have high defect densities that degrade the device performance and reliability. Conventional epitaxy lateral overgrowth (ELO) can reduce dislocation densities down to ∼10-6 cm-2 in the lateral growth area, but requires ex situ photolithography steps. Hence, an in situ method using a SiNx interlayer (nano-scale ELOG) has emerged as a promising technique. The GaN templates prepared by this method exhibit a very low dislocation density (low-10-7 cm-2) and excellent optical and electrical properties. As a cost, such high quality GaN templates containing SiN, nanonetworks are not suitable for heterojunction field effect transistor (HFET) applications due to degenerate GaN:Si layer which serves as parallel conduction channel. This dissertation discusses the growth of low dislocation density GaN templates, by using the in situ SiNx nanonetwork for conductive templates, and the AIN buffer for semi-insulating templates. On SiN x nanonetwork templates, double-barrier RTD and superlattice (SL) exhibited negative differential resistances. Moreover, the injection current of Blue LEDs (450 nm) was improved ∼30%. On semi-insulating GaN templates, nearly lattice matched AlInN/AIN/GaN HFETs were successfully demonstrated and exhibited ∼ 1600 cm2/Vs and 17 600 cm2/Vs Hall mobilities at 300 K and 10 K, respectively. Those mobility values are much higher than literature reports and indicate that high quality HFETs can be realized in lattice matched AlInN/AIN/GaN, thereby solving the strain related issue. The attempt to use InGaN as the 2DEG channel has also been successfully implemented. A Hall mobility (1230 cm2/Vs) was achieved in a 12 nm InGaN channel HFET with AlInGaN barrier, which demonstrates the viability of InGaN channel HFETs.
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机译：III型氮化物的独特特性（例如大的直接带隙，出色的热稳定性，高的μH×ns）使其成为光电和高速电子设备的理想选择。在过去的几十年中，基于GaN的发光二极管（LED）和激光二极管（LD）的商业化取得了巨大的成功。但是，由于缺少天然衬底，因此在蓝宝石或SiC衬底上生长的薄膜具有较高的缺陷密度，从而降低了器件性能和可靠性。传统的外延横向过度生长（ELO）可以将横向生长区域的位错密度降低至约10-6 cm-2，但需要异位光刻步骤。因此，已经出现了使用SiNx中间层的原位方法（纳米级ELOG）作为有前途的技术。通过这种方法制备的GaN模板表现出非常低的位错密度（低-10-7 cm-2）以及出色的光学和电学性能。作为成本，这种含SiN纳米网络的高质量GaN模板由于退化的GaN：Si层用作平行导电通道，因此不适合异质结场效应晶体管（HFET）应用。本文以导电模板为原位SiNx纳米网络，半绝缘模板为AIN缓冲层，探讨了低位错密度GaN模板的生长。在SiN x纳米网络模板上，双势垒RTD和超晶格（SL）表现出负的差分电阻。此外，蓝色LED（450 nm）的注入电流提高了约30％。在半绝缘的GaN模板上，成功地证明了与晶格匹配的AlInN / AIN / GaN HFET，它们在300 K和10 K时分别具有1600 cm2 / Vs和17600 cm2 / Vs的霍尔迁移率。这些迁移率值远远高于文献报道，表明可以在晶格匹配的AlInN / AIN / GaN中实现高质量的HFET，从而解决了应变相关的问题。将InGaN用作2DEG通道的尝试也已成功实现。在具有AlInGaN势垒的12 nm InGaN沟道HFET中实现了霍尔迁移率（1230 cm2 / Vs），这证明了InGaN沟道HFET的可行性。
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