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Monitoring and designing predictable time-triggered software architecture for real-time embedded applications

机译:监视和设计用于实时嵌入式应用程序的可预测的时间触发软件体系结构

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摘要

Modern industrial applications often employ embedded processors – programmed with dedicated software – to perform some tasks in real time. In many such designs, the software running on the processor is developed according to rigorous industry standards. Even with such state-of-the art designs, problems can occur “in the field” due to unforeseen circumstances – such as electromagnetic interference – that could undermine the underlying assumptions made at design time. It therefore remains essential to monitor the system at run-time, in order to detect any deviations from the required system behaviour.\udHowever, monitoring embedded systems is a far from trivial process, not least because such systems are becoming increasingly complex. Also, variations in task execution times are likely to occur, and can have negative impacts on system predictability particularly in the presence of jitter-sensitive tasks. In addition, it is rarely possible (or cost-effective) to add precise monitoring capabilities to a system which has not been developed from the outset with such requirements in mind.\udThe work described in this thesis seeks to address these issues by introducing and evaluating a “predictable time-triggered” (pTT) framework that combines: a pTT scheduling algorithm and a hardware-based pTT monitor. A novel jitter-reduction technique in a pTT algorithm allows jitter-sensitive tasks to be executed in constant periods without the need to re-compute the entire task schedule. The studies reported in this thesis show that, with existing jitter-reduction methodologies, a pTT algorithm can provide extremely predictable temporal behaviour. The studies also show that the novel low-cost pTT monitor – that operates by monitoring fluctuations in the processor power consumption through a simple hardware interface – adds an additional level of safety by allowing run-time errors to be detected at a time resolution of microseconds. These findings provide sufficient evidence that the pTT framework could be an appropriate model for safety-critical system design.
机译:现代工业应用程序通常使用嵌入式处理器(通过专用软件编程)来实时执行某些任务。在许多此类设计中,处理器上运行的软件是根据严格的行业标准开发的。即使采用最先进的设计,由于不可预见的情况(例如电磁干扰)也可能在“现场”发生问题,这些情况可能会破坏设计时所做的基本假设。因此,在运行时监视系统对于检测与所需系统行为的任何偏差仍然至关重要。\ ud然而,监视嵌入式系统绝非易事,尤其是因为此类系统变得越来越复杂。同样,任务执行时间的变化很可能发生,并且可能对系统的可预测性产生负面影响,尤其是在存在抖动敏感任务的情况下。此外,很少有可能(或具有成本效益的)向尚未从一开始就开发出来的系统中添加精确的监视功能,并牢记此类要求。\ ud本文中介绍的工作旨在通过引入和解决这些问题来解决这些问题。评估一个“可预测的时间触发”(pTT)框架,该框架结合了:pTT调度算法和基于硬件的pTT监视器。 pTT算法中一种新颖的减少抖动技术,使抖动敏感的任务可以在恒定的时间内执行,而无需重新计算整个任务时间表。本论文报道的研究表明,利用现有的降低抖动方法,pTT算法可以提供非常可预测的时间行为。研究还表明,新颖的低成本pTT监控器(通过简单的硬件接口监控处理器功耗的波动来运行)通过允许以微秒的时间分辨率检测运行时错误而增加了安全级别。 。这些发现提供了充分的证据证明pTT框架可以成为安全性至关重要的系统设计的合适模型。

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  • 作者

    Chan, Kam Leung;

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  • 年度 2012
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  • 原文格式 PDF
  • 正文语种 {"code":"en","name":"English","id":9}
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