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Conductive Trace Design in 3-D Circuit Architectures: Heat Transfer Analysis and Experiments

机译:3-D电路架构中的导电迹线设计:传热分析和实验

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摘要

Recent research efforts have been devoted to developing technologies for fabricating electronic circuits in three dimensions using ink-jet processes. The management of generated heat in such circuits will require them to incorporate specialized design features for promoting the removal of unwanted heat from key areas and the limiting of component temperatures to safe levels. Hence, effective tools for predicting the heat transfer characteristics of three-dimensional circuits are required to develop optimum designs.This research encompasses a course of investigation including the development of such design tools and their verification using experimental methods. These experimental methods consisted of thermal tests conducted with prototype circuits constructed in three dimensions, with materials appropriate to the overarching design concept. After the verification process, the investigation proceeded with the construction of numerical models to compare a range of design features expected to enhance passive heat rejection in the discrete resistive component. The relative impact of each of these structures as well as the impact of specific material choices is comparatively evaluated using the developed tools.Further research centered on the fabrication and testing of a circuit which more fully incorporated the 3-D architecture by employing a surface-mount technology (SMT) resistor and by embedding the resistor and conductive components within a cast polymer matrix. Experiments with this circuit and corresponding finite-element models showed that for the power dissipation levels investigated, the presence of the embedding medium actually results in lower temperatures at the resistive component.It was shown in the course of this latter investigation that film coefficients calculated by standard methods do not effectively account for interactions between adjacent convective surfaces in these circuit architectures. A numerical model featuring thermal/fluid dynamics capability and simplified geometry compared to the actual circuit was shown to correlate well with live tests. These model results can be used to calculate improved values for the film coefficients to be applied to models not featuring fluid capability. The models with improved film coefficients similarly provided resistor temperature values which correlated well with the live test results.
机译:最近的研究努力致力于开发使用喷墨工艺来制造三维电子电路的技术。在此类电路中产生的热量的管理将要求它们结合专门的设计功能,以促进从关键区域去除多余的热量并将组件温度限制在安全水平。因此,需要有有效的工具来预测三维电路的传热特性,以开发最佳的设计。这项研究涵盖了一个研究过程,包括开发这种设计工具并使用实验方法进行验证。这些实验方法包括对三维结构的原型电路进行热测试,并采用适合总体设计概念的材料。在验证过程之后,研究工作开始进行数值模型的构建,以比较一系列旨在增强分立电阻元件中被动散热性能的设计特征。使用开发的工具对每种结构的相对影响以及特定材料选择的影响进行了比较评估。进一步的研究集中在电路的制造和测试上,该电路通过采用表面绝缘技术更完全地结合了3D结构。安装技术(SMT)电阻器,以及将电阻器和导电组件嵌入浇铸的聚合物基体中。使用该电路和相应的有限元模型进行的实验表明,对于所研究的功耗水平,嵌入介质的存在实际上导致电阻元件的温度降低。在这些电路架构中,标准方法不能有效地解决相邻对流表面之间的相互作用。结果表明,与实际电路相比,具有热/流体动力学功能和简化的几何形状的数值模型与实时测试具有良好的相关性。这些模型结果可用于计算薄膜系数的改进值,该系数将应用于不具有流体能力的模型。具有改进的薄膜系数的模型类似地提供了电阻器温度值,该电阻器温度值与实时测试结果密切相关。

著录项

  • 作者

    Guido Michael Robert;

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  • 年度 2006
  • 总页数
  • 原文格式 PDF
  • 正文语种 en
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