ETUDE DES PHENOMENES DE DEGRADATION DE TYPE
NEGATIVE BIAS TEMPERATURE INSTABILITY (NBTI)
DANS LES TRANSISTORS MOS SUBMICRONIQUES DES
FILIERES CMOS AVANCEES

摘要

CMOS transistor scaling-down involves an increase in the manufacturing complexity and brings up reliability as a serious challenge to overcome in recent node technologies. In this context, it is mandatory to characterize and model the various failure mechanisms at the transistor level. This work of thesis specifically focuses on the reliability issue called "Negative Bias Temperature Instability" (NBTI) in ultra thin gate oxide transistors. Mechanisms lying behind NBTI are the interface traps generation, the fixed charges build-up and the hole trapping in the gate oxide. The degradation modeling proposed here predicts both the temperature and the oxide field accelerations, anticipates the recovery phenomena, while remaining in agreement with intrinsic characteristics of each defects and materials modifications. This work of thesis opens the electrical characterization field with both tests methods and parameters extraction optimizations in ultra thin gate oxides by eliminating the recovery phenomena - an inconsistency with the conventional techniques. Thus, a new technique "on-the-fly" has been developed which makes possible the characterization and the stress in the same time using suitable pulses trains. Finally, a new methodology has been developed to take into account real transistors operations conditions, and an innovative compensation of the NBTI has been proposed for both digital and analog circuits.