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Direct Digital Design of PIDF Controllers with ComPlex Zeros for DC-DC Buck Converters

机译:具有复杂零的PIDF控制器直接数字设计DC-DC降压转换器

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摘要

This paper presents a new direct digital design method for discrete proportional integral derivative PID + filter (PIDF) controllers employed in DC-DC buck converters. The considered controller structure results in a proper transfer function which has the advantage of being directly implementable by a microcontroller algorithm. Secondly, it can be written as an Infinite Impulse Response (IIR) digital filter. Thirdly, the further degree of freedom introduced by the low pass filter of the transfer function can be used to satisfy additional specifications. A new design procedure is proposed, which consists of the conjunction of the pole-zero cancellation method with an analytical design control methodology based on inversion formulae. These two methods are employed to reduce the negative effects introduced by the complex poles in the transfer function of the buck converter while exactly satisfying steady-state specifications on the tracking error and frequency domain requirements on the phase margin and on the gain crossover frequency. The proposed approach allows the designer to assign a closed-loop bandwidth without constraints imposed by the resonance frequency of the buck converter. The response under step variation of the reference value, and the disturbance rejection capability of the proposed control technique under load variations are also evaluated in real-time implementation by using the Arduino DUE board, and compared with other methods.
机译:本文提出了一种新的直接数字设计方法,用于DC-DC降压转换器中采用的离散比例积分衍生PID +滤波器(PIDF)控制器。所考虑的控制器结构导致适当的传递函数,其具有通过微控制器算法直接可实现的优点。其次,它可以写成无限脉冲响应(IIR)数字滤波器。第三,通过转移函数的低通滤波器引入的进一步自由度可用于满足额外的规格。提出了一种新的设计程序,其中包括基于反转式的分析设计控制方法的极零消除方法的结合。采用这两种方法来减少COUNT转换器的传递函数中的复合极引入的负效应,同时完全满足稳态规范对抖动误差和相位裕度的频域要求以及增益交叉频率。所提出的方法允许设计者分配闭环带宽而没有由降压转换器的谐振频率施加的约束。在参考值的步骤变化下的响应以及在负载变化下的所提出的控制技术的扰动抑制能力也通过使用Arduino upliation进行了实时实现,并与其他方法进行比较。

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