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Hafnium oxide-based dielectrics by atomic layer deposition

机译:通过原子层沉积的氧化f基电介质

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摘要

In 2007 there was an important change in the architecture of nanotransistors - the building blocks of modern logic and memory devices. This change was from utilising thermally grown silicon dioxide as a dielectric to so-called high-_ hafnium oxide dielectrics grown by atomic layer deposition. The _rst production logic devices of this era used a hafnium oxide dielectric layer deposited by thermal atomic layer deposition; using HfCl4 and H2O as the precursors. Present day fabrication makes use of hafnium oxide-based atomic-layer-deposited dielectric _lms. The latest nanotransistor devices utilise a third generation hafnium oxide-based dielectric material. This thesis examines hafnium oxide-based thin _lm dielectric materials prepared by thermal atomic layer deposition on silicon substrates. Speci_cally the enhancement of the dielectric response of hafnium oxide by the addition of other elements is examined. Two ternary materials systems were deposited by thermal atomic layer deposition and analysed: titanium-hafnium oxide and cerium-hafnium oxide. Hafnium oxide _lms were deposited to be used as measurement benchmarks. Cerium oxide _lms were also deposited and analysed in their own right as potential dielectric layers. The hafnium oxide and both ternary deposition experiments used (MeCp)2Hf(OMe)(Me) as the hafnium precursor. The titanium-hafnium oxide growth used Ti(iOPr)4 as a titanium source and the cerium oxide and cerium-hafnium oxide work utilised Ce(mmp)4 as a cerium source. Post-deposition specimen sets consisted of an as-deposited sample, a sample spike-annealed in N2 at 850 _C and a sample annealed for 30 minutes at 500 _C. These annealing regimes were performed to mimic typical gate-_rst and gate-last transistor processing steps. The compositions and thicknesses of the _lms were measured using medium energy ion scattering. The structure of the _lms was analysed by X-ray di_raction and Raman spectroscopy. Capacitance-voltage and current density- _eld measurements were taken from fabricated MOS capacitor specimens to assess the dielectric response of the _lms. X-ray di_raction and Raman measurements showed that un-doped HfO2 had monoclinic crystallinity as-deposited and after the two annealing regimes. The dielectric constant and leakage current density, 17 and 1.7_10
机译:2007年,纳米晶体管的体系结构发生了重要变化,这是现代逻辑和存储设备的基础。这种变化是从利用热生长的二氧化硅作为电介质到通过原子层沉积法生长的所谓的高氧化oxide电介质。这个时代的第一个生产逻辑器件使用通过热原子层沉积法沉积的氧化ha电介质层;使用HfCl4和H2O作为前体。当前的制造利用了基于氧化oxide的原子层沉积的电介质_lms。最新的纳米晶体管器件利用了第三代基于氧化dielectric的介电材料。本文研究了通过在硅衬底上热原子层沉积制备的基于氧化f的薄膜电介质材料。具体地,研究了通过添加其他元素来增强氧化ha的介电响应。通过热原子层沉积法对两种三元材料体系进行了沉积和分析:钛-氧化物和铈-氧化物。沉积氧化f_lms用作测量基准。氧化铈薄膜也被沉积并作为潜在的电介质层进行了分析。氧化ha和两个三元沉积实验均使用(MeCp)2Hf(OMe)(Me)作为the前体。钛-oxide氧化物的生长使用Ti(iOPr)4作为钛源,而氧化铈和铈-ha氧化物的加工利用Ce(mmp)4作为铈源。沉积后的样品组由沉积后的样品,在850℃的N2中进行尖峰退火的样品以及在500℃退火30分钟的样品组成。执行这些退火机制以模仿典型的栅极-rst和后栅极晶体管的处理步骤。 Ilm的组成和厚度是使用中能离子散射测量的。通过X射线衍射和拉曼光谱分析了_lms的结构。电容-电压和电流密度-实地测量值是从制作的MOS电容器样品中获得的,以评估_lms的介电响应。 X射线衍射和拉曼测量表明,未掺杂的HfO2在两种退火方式下均具有沉积的单斜结晶性。介电常数和泄漏电流密度分别为17和1.7_10

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    King P;

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  • 年度 2000
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