Array Processing of the Three-Dimensional Navier-Stokes Equations

摘要

Results are presented of the investigation of the union of the factored finite element Navier-Stokes (SFENS) algorithm with new and proposed computer systems and hardware architectures. The algorithm was decomposed into its basic elements, and parallelism inherent in the algorithm was defined. The algorithm was evaluated on single instruction, multiple data (SIMD), multiple instruction, multiple data (MIMD), and systolic architectures on the bases of processor timing, data movement, and paging. It is concluded that the SFENS algorithm exhibits sufficient flexibility for adaptation to parallel architectures and that general purpose vector processors permit adaptation of algorithms to the architecture, but efficiency of the combined system is related to how well the algorithm maps. It is determined that solution of the SFENS algorithm on the CYBER-205 and CRAY-1 S machines is possible using relatively coarse grids.