Electrical Field and Substrate Current Reduction in MOS-Structures

摘要

To produce mega-bit RAMS it will be necessary to produce small MOS devices: this means a thin gate-oxide, short channel length and shallow source- and drain junction depth. However, since reduction in device dimensions is not accompanied by a corresponding reduction in supply voltage, higher electric fields are generated within the device. Such intense electric fields cause hot-carrier phenomena leading to a deterioration of device performance. Hence it is necessary to design 'hot-carrier-resistant' MOSFET's which give relief with respect to these phenomena. The most flexible structure, the lightly doped drain (LDD) will be discussed. The report consists of two parts: in the first part the conventional MOST is discussed, whereas the second part deals with the Lightly doped drain (LDD) device.