Frequency Comparator for Electronic Clocks.

摘要

A device for comparing the frequency of the output signals of a plurality of electronic clocks such as cesium beam time and frequency standards. A plurality of circular shift registers are loaded with identical binary patterns which are circularly clocked through the shift registers by the electronic clocks under test. Logic gates at the outputs of the circular shift registers detect the coincidence of the bit patterns during preselected intervals. As long as the outputs of these logic gates indicate a coincidence during the preselected interval, a holdover multivibrator at the output of each logic gate holds its output at a predetermined level. If a coincidence does not occur during the predetermined interval thereby indicating an error in one of the electronic clocks, the associated holdover multivibrator will change its output condition. This change in output condition of the holdover multivibrator results in the switching of a switching network connected at the output of each holdover multivibrator. A set of logic gates are connected to the outputs of the switching networks such that a failure or an error in any of the electronic clocks is indicated by the appearance of an output signal from the logic gate associated with the electronic clock that is in error.