Clocked power converter, has comparator circuit comprising timer for limiting variable frequency of comparator signal to upper frequency limit that is formed above filter cut-off frequency and below driving frequency

摘要

The converter (1) has an alternating current (AC) signal generator circuit (10) comprising a switching element (11). A filter (32) is arranged downstream to the generator circuit and provided with filter cut-off frequency and an output signal terminal (40). An actual value and a reference value are supplied to a comparator circuit (60). The comparator circuit comprises a timer for limiting variable frequency of a comparator signal to an upper frequency limit that is formed above the filter cut-off frequency and below driving frequency. An independent claim is also included for a method for controlling an output of a power converter.