Die Attach Quality of Multiple Cell Power Transistors

摘要

Multiple cell single chip power devices dissipate power at discrete locations across the semiconductor die. Traditional tests of die attach quality, such as thermal resistance and die shear measurements, do not address the power density topology of the die. This paper correlates x-ray photographs of die attach interfaces with acceptable and unacceptable operating device temperature profiles to obtain a more meaningful test of die attach quality. (ERA citation 04:006436)