Effects of Plasma-Deposited Silicon Nitride Passivation on the Radiation Hardness of CMOS Integrated Circuits

摘要

The use of plasma-deposited silicon nitride as a final passivation over metal-gate CMOS integrated circuits degrades the radiation hardness of these devices. The hardness degradation is manifested by increased radiation-induced threshold voltage shifts caused principally by the charging of new interface states and, to a lesser extent, by the trapping of holes created upon exposure to ionizing radiation. The threshold voltage shifts are a strong function of the deposition temperature, and show very little dependence on thickness for films deposited at 300 exp 0 C. There is some correlation between the threshold voltage shifts and the hydrogen content of the PECVD silicon nitride films used as the final passivation layer as a function of deposition temperature. The mechanism by which the hydrogen contained in these films may react with the Si/SiO sub 2 interface is not clear at this point. (ERA citation 05:026153)