4-Mbit Non-Volatile Chalcogenide-Random Access Memory Designed for Space Applications (Preprint)

摘要

A 4Mbit non-volatile Chalcogenide-Random Access Memory (C-RAM)(tm) has been designed and fabricated in RH25, a radiation hardened CMOS technology. The top-down design focused on accommodating chalcogenide process variations and satisfying space system specifications. The optimized band-gap circuit supplies reference current and voltage that meet temperature and voltage requirements. The innovative write circuitry supplies appropriate currents (amplitude and shape) to the chalcogenide memory cells to allow them to be programmed either in amorphous state (write '0') or crystalline state (write '1'). The on-chip pulse generator circuit can provide multiple pulse widths for write '0' and write '1', as well as preconditioning pulse. The write circuits have a dedicated power supply, which can be removed to place the part in a read only mode. The read circuitry includes a voltage limiting circuity, an adjustable current reference, an adjustable pre-charge circuitry, and a sense amplifier to accurately sense the current difference between cells programmed as '0' or '1'. A localized redundant cell architecture is implemented with shared read/write circuits to improve yield without impacting access times. The redundant cells can be tested prior to laser fusing or used to monitor endurance. Considerations for testability such as direct chalcogenide cell access, margin test, analog monitors, and endurance acceleration have been implemented. Noise and power reduction techniques have also been used globally.