Circuit-Switched Memory Access in Photonic Interconnection Networks for High-Performance Embedded Computing

摘要

As advancements in CMOS technology trend toward ever increasing core counts in chip multiprocessors for high-performance embedded computing, the discrepancy between on- and off-chip communication bandwidth continues to widen due to the power and spatial constraints of electronic off-chip signalling. Silicon photonics-based communication offers many advantages over electronics for network-on-chip design, namely power consumption that is effectively agnostic to distance traveled at the chip- and board-scale, even across chip boundaries. In this work we develop a design for a photonic network-on-chip with integrated DRAM I/O interfaces and compare its performance to similar electronic solutions using a network-on-chip simulation environment that uniquely captures the physical characteristics of the photonic layer. When used in a circuit-switched network, silicon nanophotonic switches offer higher bandwidth density, low power transmission, and relaxed physical constraints such as pin count and board layout. These effects add up to over 10x better performance and 20-3Ox lower power for projective transform, matrix multiply, and Fast Fourier Transform (FFT), all key algorithms in embedded real-time signal and image processing.