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Subtractive Plasma-Assisted-Etch Process for Developing High Performance Nanocrystalline Zinc-Oxide Thin-Film-Transistors.

机译:用于开发高性能纳米晶氧化锌薄膜晶体管的减法等离子体辅助蚀刻工艺。

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Thin-Film-Transistors (TFTs) employing undoped zinc-oxide (ZnO) thin-films are currently being investigated by the Air Force for microwave switching applications. Since the on-resistance (R(on)) of the device scales with channel length (LC), ZnO TFT optimization should be focused on reducing LC, therefore minimizing the associated insertion losses. In this research, deep sub-micron scaling of ZnO TFTs was undertaken using a subtractive reactive-ion-etch (RIE) process. Under optimum processing conditions, ZnO TFTs with LC as small as 155 nm were successfully demonstrated. The active ZnO channels of the TFTs were patterned by selective SF6-RIE of a tungsten ohmic film through electron-beam defined openings in a polymethyl-methacrylate (PMMA) based resist. Through electrical testing, the width normalized R(on) of ZnO TFTs with 155 nm channels was extracted as 3.6 omega dot mm and the devices were found to operate at drain current densities and transconductance values of 830 mA/mm and 121 mS/mm, respectively. Additionally, a total width-normalized source and drain parasitic resistance of 2.1 omega dot mm was observed using a gated transfer length method (TLM), indicating the tungsten-ZnO interface is low resistance. This demonstration of high performance and low R(on) suggests the potential for ZnO TFTs in switching and microwave power applications.

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