Experimental Analysis of Impurity Energy Levels in Semiconductors.

摘要

The major emphasis of this investigation was intended as a clarification of the extent to which deep-lying impurity levels can be explored capacitively in metal-semiconductor systems. A simple lumped constant equivalent circuit representation was developed for a distribution of energy levels of majority carrier trapping centers in Schottky barriers. An improved electronically balanced broad band capacitance measuring system was designed, built for measurements from about 10 H z to 200 kHz. The Hf-p type Si Schottky barrier system was investigated and shown to have approximately 0.6 ev barrier height. The hole capture cross-section for In in p-type Si was measured over the temperature range 58 K to 133 K.