GaAs Heterojunction Device Based A/D (Progress Report Number 12, May 1-30, 1988).

摘要

Two ADC lots completed processing during May. These lots, the second and third completed ADC lots, exhibit low transistor gains similar to the first lot, although one slice from the third lot does exhibit gains greater than 50 and could result in potentially good ADC circuits. The dc current gain was 100 at low current and 1000 at high current. These gain values were obtained over one chip, but started decreasing in adjacent chips. A 19-stage HECL ring oscillator fabricated on this wafer and designed with the emitter HBT and differential interstage coupling gave switching speeds of 87 ps/gate at 27 mW/gate. This result validates the potential of the overgrowth process while indicating much work still needs to be done on uniformity and yield. The third lot has been shipped to Hughes along with the dc multiprobe wafer maps for testing of the ADCs and sample-and-hold circuits.