Design and Simulation of a Gallium-Arsenide Second Order Sigma-Delta Analog toDigital Converter

摘要

In this report, the design and simulation of a sigma-delta a sigma a analog-digital converter is presented. The key to sigma-delta conversion is trading off time resolution for amplitude resolution. In this report, second-order converters are used which allows the amplitude resolution to increase several times faster than the time resolution decreases. The sigma-delta modulator contains two basic components-an analog sigma-delta modulator and a digital low-pass filter. The modulator generates a stream of bits representing the analog input. The low-pass filter takes out the high frequency variations in this bit stream and generates a stream of multi-bit words. The report shows the designs and simulations of two different second-order sigma-delta modulators. Both of these circuits use Gallium-Arsenide MESFET technology to achieve an oversampled clock rate of 512-MHz. The first modulator contains unique integrators based on the square law of field effect transistors (FETSs). The second modulator contains integrators using single-stage op-amps, current sources, and current sinks. Both modulators contain a unique clocking scheme that allows the continuous-time.